The present invention relates to magnetic bubble memories and more particularly to a self-healing bubble memory having error correcting capabilities for the data of the memory, and dynamic reordering of an electrically alterable programmable read only memory (EAPROM) which stores data identifying good and bad storage loops.
Large scale bubble memory systems, particularly those with hundreds, or even thousands, of storage loops inevitably have a significant number of defective loops. Several different architectural organizations of magnetic bubble memories have been devised. The organization currently in favor uses many storage loops around which magnetic domains ("bubbles") are propagated by an in-plane rotating magnetic field. The storage loops are linked on one end by a write track aligned perpendicular to the storage loops and similarly on the other end by a read track.
When such devices are manufactured, a number or redundant loops are included which may be substituted for bad loops. Data pertaining to the locations of the defective loops are stored in separate magnetic bubble loops. Since these storage bubble loops are subject to developing defects with time, this solution, however, is not completely satisfactory. An improvement of this technique was disclosed in U.S. Pat. No. 4,070,651 issued Jan. 24, 1978 which disclosed the use of non-volatile semiconductor memory, for example a programmable read only memory (PROM), for storage of the identity of defective minor loops so that data would not be read out of a defective loops, nor would data be written into a defective loop.
While use of such a PROM was satisfactory upon initialization of such memory device, it required the replacement of the PROM with an entirely new PROM when defects in the bubble memory developed during operation and memory chips had to be replaced. U.S. Pat. No. 4,354,253 which issued Oct. 12, 1982, disclosed a further improvement in which an erasable programmable read only memory that was initialized upon manufacture of the bubble memory was erased and reprogrammed if a memory chip was replaced during servicing.
While keeping track of the initial defects of a bubble memory system is important, the most frequent fault that occurs in bubble memory systems is that as they age, they develop additional weak, or bad loops, over and above those which were defined at the time of manufacture. As these loops deteriorate with time, they introduce errors into the data stream. In order to overcome these dynamic defects, error detecting, correcting and logging capabilities were included in bubble memory systems which generally relied on cyclic redundancy coding (CRC), or other suitable coding and decoding techniques. Examples of suitable error detecting and correcting schemes are shown in "A PROM-Based Decoder Detects and Corrects Errors" published in Electrical Design News June 20, 1980, and U.S. Pat. No. 4,345,328 issued Aug. 12, 1982. In the system disclosed in U.S. Pat. No. 4,345,328, single bit error correction and double bit error detection could be accomplished.
However, the occurrence of single bit errors which are correctable and identifiable with respect to data stored in a single storage loop is an indication that the loop is weakening, or aging. Frequent single bit errors caused by this weakening loop increase the probability of combination with a transient error from another loop causing a double bit, uncorrectable error. With prior systems it became necessary at this time to service the unit in order to eliminate weakening loops by replacing bubble memory chips.
Various other solutions to the problem of bad loops have been proposed. For example, in U.S. Pat. No. 3,909,810 which is directed to a major/minor loop organization, there was a suggestion that repeated failure of a parity check could cause a host computer to shift the data that was not lost to good minor loops from bad minor loops and to set a flag. This technique, however, did not contemplate error correction, was not applied to block replicate memory organization and resulted in a loss of some data, which in many applications cannot be tolerated.
Location of faulty elements in a content-addressable-memory through use of an EAPROM is disclosed in U.S. Pat. No. 4,376,300 issued Mar. 8, 1983. When this system was turned on, a program was read into the content addressable memory (CRAM) and it was suggested that this memory could also be programmed to recognize addresses of a newly failed element by utilization of a program which is read into the CRAM.